View MAX2370_1064124.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-0222; Rev 0; 5/05
KIT ATION EVALU ABLE AVAIL
Complete 450MHz Quadrature Transmitter
General Description
The MAX2370 integrated quadrature transmitter is designed for 450MHz applications. The device takes a differential I/Q baseband input and converts it up to intermediate frequency (IF) through a quadrature modulator and IF variable-gain amplifier (VGA). The signal is then routed to an external IF filter and upconverted to RF through an image-reject mixer and RF VGA. The signal is further amplified with an on-chip power amplifier (PA) driver. An IF synthesizer, an RF synthesizer, a local oscillator buffer, and an SPITM/QSPITM/MICROWIRETMcompatible, 3-wire programmable bus complete the basic functional blocks of this IC. The MAX2370 is available in a 48-pin TQFN package with exposed paddle and is specified for the extended temperature range (-40C to +85C). o 450MHz Operating Frequency o +8dBm Output Power -64dBc Typical ACPR at 885kHz Offset -66dBc Typical ACPR at 1.125MHz Offset o 100dB Power-Control Range o Dual Synthesizer for RF and IF Local Oscillators o SPI/QSPI/MICROWIRE-Compatible 3-Wire Interface Bus o Single-Sideband Upconverter o Directly Drives External Power Amplifier
Features
MAX2370
Applications
450MHz CDMA/WCDMA Phones OFDM, cdma2000(R), WCDMA, NMT Wireless Data Links
PART MAX2370ETM MAX2370ETM+
Ordering Information
TEMP RANGE PIN-PACKAGE -40C to +85C -40C to +85C 48 Thin QFN-EP* (7mm x 7mm) PKG CODE T4877-3
48 Thin QFN-EP* T4877+3 (7mm x 7mm)
*EP = Exposed paddle. +Denotes lead-free package.
LO N.C. RFPLL VCCRFCP RFCP
TOP VIEW N.C. GND GND GND
48
47
46
45
44
43
42
41
40
39
38
37 36
VCCIFCP
VCC IFCP
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. cdma2000 is a registered trademark of Telecommunications Industry Association.
Pin Configuration/ Functional Diagram
RFOUT N.C. LOCK VCCDRV IDLE VCC TXGATE IFIN+ IFINN.C. N.C. RBIAS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SPI INTERFACE

RF PLL
IF PLL
35 34 33
REF N.C. N.C. N.C. N.C. TANK+ TANKIFLO VCC SHDN II+
0 90 +45 -45
MAX2370
EP
32 31 30 29 28 27 26 25
0 /2 90
N.C. IFOUTIFOUT+
DI CS N.C.
CLK
GC VCC
________________________________________________________________ Maxim Integrated Products
VCC Q+ Q-
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Complete 450MHz Quadrature Transmitter MAX2370
ABSOLUTE MAXIMUM RATINGS
VCC, RFOUT, VCCIFCP, VCCRFCP, VCCDRV to GND.................................................-0.3V to +3.6V DI, SCLK, CS, GC, SHDN, TXGATE, IDLE, LOCK to GND.........................................-0.3V to (VCC + 0.3V) AC Input Pins (IFIN_, Q_, I_, TANK_, REF, RFPLL, LO) to GND.....................................................1V Peak Digital Input Current (SHDN, TXGATE, IDLE, SCLK, DI, CS) ...............................................................10mA
CAUTION! ESD SENSITIVE DEVICE Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 48-Pin Thin QFN (derate 38.5mW/C above +70C).....3077mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
DC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +3.3V, SHDN = IDLE = TXGATE = high, VGC = 2.5V, RBIAS = 10k, registers set according to Table 1, fREF = 19.2MHz, no AC signals applied, TA = -40C to +85C. Typical values are at VCC = +3.0V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Supply Voltage Range VCC VGC = 0.6V VGC = 1.95V PRFOUT = +5.5dBm, IFG[2:0] = 011 Operating Supply Current PRFOUT = +8dBm, IFG[2:0] = 011 Addition for IFLO buffer IDLE = low TXGATE = low Sleep-Mode Supply Current Logic-High Voltage Logic-Low Voltage Logic Input Current GC Input Current GC Input Current During Shutdown Lock Indicator High Voltage (Locked) Lock Indicator Low Voltage (Unlocked) VGC = 0.5V to 2.5V SHDN = low, VGC = 2.5V 47k pullup load 47k pullup load VCC 0.4V 0.5 -5 3.3 7 SHDN = 0V 0.7 x VCC 0.3 x VCC +5 5 11 CONDITIONS MIN 2.7 53 57 118 134 3.4 6 5 0.5 7.7 10 7 20 A V V A A A V V mA TYP MAX 3.3 79 87 UNITS V
2
_______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
AC ELECTRICAL CHARACTERISTICS
(MAX2370 EV kit, VCC = +2.7V to +3.3V, SHDN = IDLE = TXGATE = high, VGC = 2.5V, RBIAS = 10k, 50 system, TA = -40C to +85C. Typical values are at VCC_ = SHDN = IDLE = TXGATE = CS = 3.0V, fREF = 19.2MHz, LO input power = -15dBm, fLO = 575MHz, f RFOUT = 455MHz, f IF = 120MHz, registers set according to Table 1, input voltage at I and Q = 130mV RMS differential, cascade specifications assume 400 IF filter with 5dB insertion loss, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER MODULATOR IF Frequency Range I/Q Common-Mode Input Voltage I/Q Input Current Gain-Control Range Gain Variation Over Temperature Carrier Suppression Sideband Suppression IF Output Noise at Rx Band Typically meets 30dB sideband suppression over this frequency range (Notes 2, 3) VCM = 1.4V VGC = 0.5V to 2.5V +25C < TA < +85C TA = -40C 30 30 70 87 85 -2.4, +3.4 40 40 -138 -66 -69 -84 -89 -135 1.35 95 to 195 VCC 1.25 6 MHz V A dB dB dB dB dBm/Hz CONDITIONS MIN TYP MAX UNITS
Relative to +25C, TA = -40C to +85C VGC = 2.5V VGC = 2.5V VGC set to give -12dBm IF output power, noise measured at 10MHz offset (Note 4) VGC set to give -12dBm IF output power, IFG[2:0] = 011 fOFFSET = 885kHz in 30kHz BW fOFFSET = 1.125MHz in 30kHz BW fOFFSET = 1.98MHz in 30kHz BW fOFFSET = 4MHz in 30kHz BW
IF Adjacent Channel Power Ratio IS-95 Reverse Modulation
dBc
UPCONVERTER AND PREDRIVER RFOUT Frequency Range LO Frequency Range LO and RFPLL Input Power Conversion Gain MPL Gain Change RF Gain-Control Range RF Image Suppression Rx Band Noise Power MPL = 0, gain relative to MPL = 1 VGC = 0.5V to 2.5V +25C < TA < +85C 30 TA = -40C At maximum output power See the Typical Operating Characteristics for typical gain vs. frequency Typically meets 30dB image suppression over this range -15 410 to 500 530 to 695 -7 23 -3.4 44 46 -20 -130 -128.5 0 MHz MHz dBm dB dB dB dBc dBm/Hz
PRFOUT = +8dBm, noise measured at +10MHz offset (Note 4) 5.5
CASCADED MODULATOR, UPCONVERTER, AND PREDRIVER RFOUT Output Power Meets ACPR specifications (Note 4) fOFFSET = 885kHz in 30kHz BW POUT = +8dBm, IFG[2:0] = 011 Adjacent Channel Power Ratio IS-95 Reverse Modulation (Note 4) POUT = +5.5dBm, IFG[2:0] = 011 fOFFSET = 1.125MHz in 30kHz BW fOFFSET = 1.98MHz in 30kHz BW fOFFSET = 4MHz in 30kHz BW fOFFSET = 885kHz in 30kHz BW fOFFSET = 1.125MHz in 30kHz BW fOFFSET = 1.98MHz in 30kHz BW fOFFSET = 4MHz in 30kHz BW
10 -64 -66 -82 -86 -64 -67 -81 -86 -57 -61 -78 -78 -58 -62 -78 -85
dBm
dBc
_______________________________________________________________________________________
3
Complete 450MHz Quadrature Transmitter MAX2370
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2370 EV kit, VCC = +2.7V to +3.3V, SHDN = IDLE = TXGATE = high, VGC = 2.5V, RBIAS = 10k, 50 system, TA = -40C to +85C. Typical values are at VCC_ = SHDN = IDLE = TXGATE = CS = 3.0V, fREF = 19.2MHz, LO input power = -15dBm, fLO = 575MHz, f RFOUT = 455MHz, f IF = 120MHz, registers set according to Table 1, input voltage at I and Q = 130mV RMS differential, cascade specifications assume 400 IF filter with 5dB insertion loss, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Output Power Variation Over Temperature IF PLL Reference Frequency Reference Frequency Signal Level IF Main-Divide Ratio IF Reference-Divide Ratio VCO Operating Range ICP = 00 Charge-Pump Source/Sink Current Turbolock Boost Current Charge-Pump Source/Sink Current Matching IF Charge-Pump Compliance RF PLL RF PLL Frequency Range Reference Frequency RF Main-Divide Ratio RF Reference-Divide Ratio RCP = 00 Charge-Pump Source/Sink Current Turbolock Boost Current Charge-Pump Source/Sink Current Matching RF Charge-Pump Compliance Phase-Detector Noise Floor RCP = 11, RCP_TURBO1 = RCP_TURBO2 = 0, 50kHz comparison frequency RCP = 01 RCP = 10 RCP = 11 (Note 5) All values of RCP, over compliance range 0.5 -162 ICP = 01 ICP = 10 ICP = 11 ICP = 11, ICP_MAX = 1 All values of ICP, over compliance range 0.5 96 135 190 267 533 5 0.1 256 2 190 to 390 139 192 278 390 774 174 240 348 488 968 6 VCCIFCP 0.5V 1300 5 4096 2 220 441 499 717 1152 325 650 738 1063 1694 30 262,143 8191 406 813 923 1329 2118 6 VCCRFCP 0.5V A A % V A 30 0.6 16,383 2047 MHz MHz VP-P CONDITIONS Relative to +25C, TA = -40C to +85C MIN TYP 0, -2 MAX UNITS dB
RF PLL operated at 2x LO frequency
MHz MHz
A % V dBc/Hz
Note 1: Note 2: Note 3: Note 4: Note 5:
Guaranteed by production test at TA = +25C to +85C, design and characterization at TA = -40C. ACPR is met over the specified VCM range. VCM must be supplied by the I/Q baseband source with 8A current capability. Guaranteed by design and characterization to 6. When enabled with RCP_TURBO1 and RCP_TURBO2 (see Tables 3 and 4), the total charge-pump current is specified. For all values of RCP, the total turbolock current is 1.63 times the corresponding nonturbo current value.
4
_______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
Typical Operating Characteristics
(MAX2370 EV kit, VCC_ = SHDN = IDLE = TXGATE = CS = 3.0V, fREF = 19.2MHz, LO input power = -15dBm, fLO = 575MHz, fRFOUT = 455MHz, fIF = 120MHz, RBIAS = 10k, VGC = 2.5V, registers set according to Table 1, input voltage at I and Q = 130mVRMS differential, TA = +25C, unless otherwise noted.)
RF OUTPUT POWER AND SUPPLY CURRENT vs. GAIN-CONTROL VOLTAGE
20 0 RF OUTPUT POWER (dBm) -20 -40 -60 -80 -100 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 VGC (V) CURRENT
MAX2370 toc01
IF OUTPUT POWER AND IF ACPR vs. GAIN-CONTROL VOLTAGE
MAX2370 toc02
RF OUTPUT POWER AND RF ACPR vs. GAIN-CONTROL VOLTAGE
RF OUTPUT POWER AND RF ACPR (dBm/dBc) 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 2.1 2.2 2.3 2.4 VGC (V) 2.5 2.6 2.7 ACPR 1.125MHz ACPR 885kHz ACPR 1.98MHz POWER
MAX2370 toc03 MAX2370 toc06
170 IF OUTPUT POWER AND IF ACPR (dBm, dBc) 150 SUPPLY CURRENT (mA) 130 110 90 70 50
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 2.1 2.2 2.3 2.4 VGC (V) 2.5 2.6 ACPR 1.125MHz ACPR 1.98MHz ACPR 885kHz POWER
20
POWER
2.7
RF GAIN, IMAGE SUPPRESSION, AND LO SUPPRESSION vs. FREQUENCY
30 GAIN 25 20 RF GAIN (dB) IMAGE SUPPRESSION 15 10 5 0 400 410 420 430 440 450 460 470 480 490 500 RF FREQUENCY (MHz) LO SUPPRESSION -30 -40 -50 -60 -10 SUPPRESSION (dBc) -20 NORMALIZED IF OUTPUT POWER (dB)
MAX2370 toc04
NORMALIZED IF OUTPUT POWER vs. IFG[2:0]
MAX2370 toc05
RFOUT PORT S22
1.0 0.9 0.8 S22 MAGNITUDE 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 PHASE MAGNITUDE 0 -10 -20 -30 S22 PHASE () -40 -50 -60 -70 -80 -90 -100 400 410 420 430 440 450 460 470 480 490 500 FREQUENCY (MHz)
0
0 -2 -4 -6 -8 -10 -12 -14 -16 0 1 2 5 4 IFG[2:0] (DECIMAL) 3 6 7
RFPLL PORT S11
1.0 0.9 0.8 S11 MAGNITUDE 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1050 1100 1150 1200 1250 1300 FREQUENCY (MHz) PHASE MAGNITUDE
MAX2370 toc07
LO PORT S11
0 -10 -20 S11 MAGNITUDE -30 S11 PHASE () -40 -50 -60 -70 -80 -90 -100 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 500 520 540 560 580 600 620 640 660 680 700 FREQUENCY (MHz) MAGNITUDE PHASE
MAX2370 toc08
IF OUTPUT SPECTRUM
-10 -20 -30 S11 PHASE () -40 -50 -60 -70 -80 -90 -100 POWER (dBm) -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 FREQUENCY CENTER: 120MHz, SPAN: 5MHz, RBW: 30kHz POUT = -12dBm
MAX2370 toc9
0
-10
_______________________________________________________________________________________
5
Complete 450MHz Quadrature Transmitter MAX2370
Typical Operating Characteristics (continued)
(MAX2370 EV kit, VCC_ = SHDN = IDLE = TXGATE = CS = 3.0V, fREF = 19.2MHz, LO input power = -15dBm, fLO = 575MHz, fRFOUT = 455MHz, fIF = 120MHz, RBIAS = 10k, VGC = 2.5V, registers set according to Table 1, input voltage at I and Q = 130mVRMS differential, TA = +25C, unless otherwise noted.)
RF OUTPUT SPECTRUM
MAX2370 toc10
IF LOCAL OSCILLATOR SPECTRUM
PREF = -10dBm -20 -30 IF LO POWER (dBm) -40 -50 -60 -70 -80 -90
MAX2370 toc11
10 0 -10 -20 POWER (dBm) -30 -40 -50 -60 -70 -80 -90 FREQUENCY CENTER: 455MHz, SPAN: 5MHz, RBW: 30kHz POUT = +8dBm
-10
-100 239.8
239.9
240.0
240.1
240.2
240.3
FREQUENCY (MHz)
Pin Description
PIN 1 2, 10, 11, 16, 17, 32-35, 43, 47 3 4 5 6 7 NAME RFOUT FUNCTION Transmitter RF Output. This open-collector output requires a pullup inductor to the supply voltage, which can be part of the output matching network. No Connection. Leave these pins open-circuit. Some of these pins are internally connected. Open-Drain Output Indicating LOCK Status of the IF and/or the RF PLLs. Requires an external pullup resistor. Control using configuration register bits LD_MODE[1:0]. Power Supply for the RF Driver Stage. Bypass to PC board ground with a capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. Digital Input. Drive to logic-high for normal operation. Logic-low on IDLE shuts down everything except the RF PLL. A small RC lowpass filter can be used to filter digital noise. Power Supply for the Upconverter Stage. Bypass to PC board ground with a capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. Digital Input. Drive to logic-high for normal operation. Logic-low on TXGATE shuts down everything except the RF PLL, IF PLL, IF VCO. A small RC lowpass can be used to filter digital noise. Differential IF Inputs to the RF Upconverter. IFIN+ and IFIN- are internally biased to typically VCC 1.5V. The input impedance for this port is nominally 400 differential. AC-couple the output of the differential IF filter to this port. Keep the differential lines as short as possible to minimize the effects of stray pickup. Bias Resistor Connection. Internally biased to typically 1.18V. An external resistor must be connected from RBIAS to ground to set the bias current for the upconverters and PA driver stages. The nominal resistor value is 10k. This value can be altered to optimize the linearity of the driver stage.
N.C.
LOCK VCCDRV IDLE VCC TXGATE
8, 9
IFIN+, IFIN-
12
RBIAS
6
_______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter
Pin Description (continued)
PIN 13, 14, 15 NAME CLK, DI, CS FUNCTION CMOS Inputs from the 3-Wire Serial Bus (SPI/QSPI/MICROWIRE Compatible). A small RC lowpass filter on each of these pins can be used to reduce noise on these lines.
MAX2370
18, 19
20
Differential IF Outputs. This port is active when IF_SEL is LOW and supports both FM and CDMA modes. IFOUT+ and IFOUT- must be inductively pulled up to VCC and differentially loaded with typically 560. A 400 differential IF bandpass filter is connected between this port and IFIN+/-. IFOUT-, IFOUT+ The pullup inductors can be part of the filter structure. The differential output impedance of this port is nominally 400, including the 560 external differential resistor. Keep the transmission lines from these pins as short as possible to minimize the unintentional pickup of spurious signals and noise. RF and IF Gain-Control Analog Input. Accepts input voltages from 0.5V (minimum gain) to 2.5V (maximum gain). When not driven, GC is internally biased to typically 1.5V. RC lowpass filter the GC voltage applied to this pin to remove DAC noise or PDM clock spurs. VCC VCC Power Supply for the IF VGA. Bypass to PC board ground with a 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. Power Supply for the I/Q Modulator. Bypass to PC board ground with a 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. Differential Q-Channel Baseband Inputs to the Modulator. Q+ and Q- connect directly to the bases of a differential pair and require a typical 1.35V to (VCC - 1.5V) external common-mode bias voltage. Differential I-Channel Baseband Inputs to the Modulator. I+ and I- connect directly to the bases of a differential pair and require a typical 1.35V to (VCC - 1.5V) external common-mode bias voltage. Digital Input. Drive LOW to shut down the entire IC, drive high for normal operation. A small RC lowpass filter can be used to filter digital noise. Power Supply for the VCO Section. Bypass to PC board ground with a 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. IF LO Output. Provides access to the IF VCO output and can be used to drive an external PLL. It can be disabled by logic-low on the BUF_EN control bit. IFLO is internally biased to typically 1.5V. Differential Tank Connections for the IF VCO. TANK+ and TANK- are internally biased to approximately 1.6V and must be AC-coupled to the external tank (can be DC-coupled if tank does not sink or source current). Reference Frequency Input. REF is internally biased to approximately 1.0V and must be ACcoupled to the reference source. This is a high-impedance port and must be externally terminated in the desired impedance. Power Supply for the IF Charge Pump. This supply can be different from the system VCC. Bypass to PC board ground with a minimum 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. High-Impedance IF Charge-Pump Output. Connect to the tune input of the IF VCO through the IF PLL loop filter. Keep the connection from IFCP to the tune input as short as possible to prevent spurious pickup. Power Supply for Digital Circuitry. Bypass to PC board ground with a minimum 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections.
21 22
23, 24
Q+, Q-
25, 26 27 28 29
I+, ISHDN VCC IFLO
30, 31
TANK-, TANK+
36
REF
37
VCCIFCP
38
IFCP
39
VCC
_______________________________________________________________________________________
7
Complete 450MHz Quadrature Transmitter MAX2370
Pin Description (continued)
PIN 40 NAME RFCP FUNCTION High-Impedance RF Charge-Pump Output. Connect to the tune input of the RF VCO through the RF PLL loop filter. Keep the connection from RFCP to the tune input as short as possible to prevent spurious pickup. Power Supply for the RF Charge Pump. This supply can be different from the system VCC. Bypass to PC board ground with a minimum 0.1F capacitor placed as close to the pin as possible. Do not share capacitor ground vias with other ground connections. RF PLL Input. This port drives the RF PLL. RFPLL is internally biased to typically VCC - 0.8V. RF LO Input. LO is internally biased to typically VCC - 0.8V. Ground Connection. Solder the exposed paddle (EP) evenly to the board's ground plane for proper operation.
41 42 44 45, 46, 48, EP
VCCRFCP RFPLL LO GND
Detailed Description
The MAX2370 complete quadrature transmitter accepts differential I/Q baseband inputs with external commonmode bias. A modulator upconverts the baseband inputs to a 95MHz to 195MHz IF frequency. A gain-control voltage pin (GC) controls the gain of both the IF and RF VGAs simultaneously to achieve the best current consumption and linearity performance. The IF signal is brought off-chip for filtering, then fed to a single sideband upconverter followed by the RF VGA and PA driver. The RF upconverter requires an external VCO for operation. The IF PLL, RF PLL, and operating mode can be programmed by an SPI/QSPI/ MICROWIRE-compatible 3-wire interface. The following sections describe each block in the Functional Diagram.
IFLO Output Buffer
IFLO provides a buffered LO output when BUF_EN is 1. The IFLO output frequency is equal to the IF VCO frequency, and the typical output power is -12dBm. This output is intended for applications where the receive IF is the same frequency as the transmit IF.
IF/RF PLL
The IF/RF PLL uses a charge-pump output to drive external loop filters. The loop filter is typically a passive second-order lead-lag filter. Outside the filter's bandwidth, phase noise is determined by the tank components. The two components that contribute most significantly to phase noise are the inductor and varactor. Use high-Q inductors and varactors to maximize equivalent parallel resistance. The IF_TURBO_CHARGE, RCP_TURBO1, and RCP_TURBO2 bits can be set to enable turbo mode. Turbo mode provides maximum charge-pump current during frequency acquisition. Turbo mode is disabled after frequency acquisition is achieved. When turbo mode is disabled, charge-pump current returns to the programmed levels as set by the ICP and RCP bits in the CONFIG register (Table 3).
I/Q Modulator
Differential in-phase (I) and quadrature-phase (Q) inputs are designed to be DC-coupled and biased with the baseband output from a digital-to-analog converter (DAC). The I and Q inputs need a typical DC bias of VCC / 2 and a current-drive capability of 8A. However, common-mode voltages in the 1.35V to (VCC - 1.25V) range are also acceptable. The I and Q input capacitances are typically 0.6pF to ground on each pin. The IF VCO output is fed into a divide-by-two quadrature generator block to derive quadrature LO components to drive the I/Q modulator. The output of the modulator is fed into the IF VGA.
IF VGA
The IF VGA allows the IF output level to be controlled by a voltage applied to the GC pin. The 0.5V to 2.5V voltage range on GC provides a gain-control range of > 70dB, with 2.5V providing maximum gain. The differential IF output ports are optimized for the 95MHz to 195MHz frequency range. Do not allow VGC to exceed VCC - 0.2V as this may cause oscillations at cold temperatures.
IF VCO
The IF VCO oscillates at twice the desired IF frequency. The oscillation frequency is determined by external tank components (see the IF Tank Design section). Typical spurious performance for the IF VCO is shown in the Typical Operating Characteristics.
8
Single-Sideband Mixer and RF VGA
The RF transmit mixer uses a single-sideband architecture to eliminate an off-chip RF filter. The RF VGA follows the single-sideband mixer and is controlled by the same GC voltage as the IF VGA to provide optimum
_______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter
current consumption and linearity performance. The power-control range of the RF VGA is typically 44dB. output power at the expense of 3.4dB less maximum obtainable output power. Power Management Bias control is distributed among several functional sections and can be controlled to accommodate many different power-down modes as shown in Table 8. The serial interface remains active during shutdown. Setting bit SHDN_BIT = 0 or pin SHDN = GND powers down the device. In either case, PLL programming and register information is retained.
MAX2370
PA Driver
The MAX2370 includes a PA driver that is optimized for the 410MHz to 500MHz RF frequency range. The PA driver is an open-collector output and requires a pullup inductor to VCC. The pullup inductor can act as a shunt element in a shunt-series matching network.
Programmable Registers
The MAX2370 includes eight programmable registers consisting of four divide registers, a configuration register, an operational control register, a current control register, and a test register. Each register consists of 24 bits. The 4 least significant bits (LSBs) are the register's address. The 20 most significant bits (MSBs) are used for register data. All registers contain some "don't care" bits. These can be either a 0 or 1 and do not affect operation (Figure 1). Data is shifted in MSB first, followed by the 4-bit address. When CS is low, the clock is active and data is shifted with the rising edge of the clock. When CS transitions to high, the shift register is latched into the register selected by the contents of the address bits. Typical register settings for the eight registers are shown in Table 1. The dividers and control registers are programmed from the SPI/QSPI/MICROWIRE-compatible serial port. The RFM register sets the main frequency divide ratio for the RF PLL. The RFR register sets the reference frequency divide ratio. The RF VCO frequency can be determined by the following: RF VCO frequency = fREF x (RFM / RFR) The IFM and IFR registers are similar: IF VCO frequency = fREF x (IFM / IFR) where fREF is the external reference frequency. The operational control register (OPCTRL) controls the state of the MAX2370. See Table 2 for a description of each bit's function. The configuration register (CONFIG) sets the configuration for the RF and IF PLL and the baseband I/Q input levels. See Table 3 for a description of each bit's function. The current-control register (ICCCTRL) modifies the bias current to accommodate different operating modes. In the high-power mode, MPL = 1 sets the bias current and conversion gain to deliver an output power of at least +5.5dBm from the PA drivers. In the low-noise mode, MPL = 0 reduces output noise by 2.5dB for any given
Applications Information
3-Wire Serial Interface
Figure 3 shows the 3-wire interface timing diagram. The 3-wire bus is SPI/QSPI/MICROWIRE compatible.
Electromagnetic Compliance Considerations
To produce a low-spur and EMC-compliant transmitter, minimize circular current-loop area to reduce H-field radiation. To minimize circular current-loop area, bypass all VCC pins as close to the device as possible and use the distributed capacitance of a ground plane. To minimize voltage drops, make VCC traces short and wide. Program only the necessary bits in any register to minimize cycling of the serial interface's clock. RC filtering can also be used to slow the clock edges on the 3-wire interface, reducing high-frequency spectral content. RC filtering also provides transient protection by shunting high frequencies to ground, while the series resistance attenuates the transients for error-free operation. The same applies to the logic input pins (SHDN, TXGATE, IDLE). Place high-frequency bypass capacitors close to the pins with a dedicated via for each capacitor to ground. The 48-pin thin QFN-EP package provides minimal ground inductance by using an exposed paddle under the part. Provide at least five low-inductance vias under the exposed paddle to ground. Use a solid ground plane wherever possible. Any cutout in the ground plane may act as a slot radiator and reduce its shield effectiveness. Keep RF LO traces as short as possible to reduce LO radiation and susceptibility to interference.
IF Tank Design
The IF tank is fully differential. The external tank components for 120MHz IF operation are shown in the Typical Application Circuit. See Maxim Application Note IF Tank Design for the MAX2360 at www.maxim-ic.com for more information on designing tanks for alternate IFs.
9
_______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
Internal to the IC, the charge pump has a leakage of less than 10nA. This is equivalent to a 300M shunt resistor. The charge-pump output must see an extremely high DC resistance of greater than 300M. This minimizes charge-pump spurs at the comparison frequency. Make sure there is no solder flux under the varactor or loop filter and use low-leakage capacitors.
Matching Network Layout
The layout of a matching network can be very sensitive to parasitic circuit elements. To minimize parasitic inductance, keep all traces short and place components as close to the IC as possible. To minimize parasitic capacitance, a cutout in the ground plane (and any other planes) below the matching network components can be used. Keep traces short on the high-impedance ports (e.g., IF inputs and outputs) to minimize shunt capacitance.
Layout Considerations
The MAX2370 EV kit can be used as a starting point for layout. For best performance, take into consideration power-supply issues as well as RF, LO, and IF layout.
Tank Layout
Keep the traces coming out of the tank short to reduce series inductance and shunt capacitance. Keep the inductor pads and coupling capacitor pads small to minimize stray shunt capacitance.
Power-Supply Layout
To minimize coupling between different sections of the IC, the ideal power-supply layout is a star configuration, which has a large decoupling capacitor at a central VCC node. The VCC traces branch out from this node, each going to a separate VCC pin of the MAX2370. At the end of each trace is a bypass capacitor with impedance to ground less than 1 at the frequency of interest. This arrangement provides local decoupling at each VCC pin. Use at least one via per bypass capacitor for a low-inductance ground connection. Also, connect the exposed paddle to the PC board GND with multiple vias to provide the lowest inductance ground connection possible.
Chip Information
PROCESS: BiCMOS
10
______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
MSB 24-BIT REGISTER DATA 20 BITS LSB ADDRESS 4 BITS
B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 A3 A2 A1 A0 RFM-DIVIDE RATIO (18) X X B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 RFR-DIVIDE RATIO (13) X X X X X X X B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 IFM-DIVIDE RATIO (14) X X X X X X B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 IFR-DIVIDE RATIO (11) X X X X X X X X X B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 OPERATION CONTROL BITS (16) X X X X B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 CONFIGURATION BITS (16) X X X X B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 CURRENT CONTROL BITS (16) X X X X B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 0 0 0 0 0 0 0 ADDRESS 0 0 0
RFM-DIVIDE REGISTER
RFR-DIVIDE REGISTER
ADDRESS 0 0 1
IFM-DIVIDE REGISTER
ADDRESS 0 1 0
IFR-DIVIDE REGISTER
ADDRESS 0 1 1
CONTROL REGISTER
ADDRESS 1 0 0
CONFIGURATION REGISTER
ADDRESS 1 0 1
CURRENT-CONTROL REGISTER
ADDRESS 1 1 0
TEST REGISTER X X X X X X X X X X X
TEST BITS (9) B8 B7 B6 B5 B4 B3 B2 B1 B0 0
ADDRESS 1 1 1
X = DON'T CARE
Figure 1. Register Configuration
______________________________________________________________________________________
11
Complete 450MHz Quadrature Transmitter MAX2370
Table 1. Register Settings for Typical Operation
REGISTER NAME RFM[17:0] RFR[12:0] IFM[13:0] IFR[10:0] OPCTRL[15:0] CONFIG[15:0] ICCCTRL[15:0] TEST[8:0] TYPICAL SETTINGS 23000DEC 384DEC 4800DEC 384DEC 090Fhex D03Fhex 0C38hex 100hex REGISTER ADDRESS 0000b 0001b 0010b 0011b 0100b 0101b 0110b 0111b RF M-Divider Count RF R-Divider Count IF M-Divider Count IF R-Divider Count Operational Control Settings Configuration and Setup Control Current Multiplication Factor, Throttle-Back Control, Modulator Bypass, Compensation for Gain Variation Over Temperature, Maximum PowerLevel Setting Test Mode Control FUNCTION
12
______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
Table 2. Operation Control Register (OPCTRL, Address: 0100b)
BIT NAME RESERVED RCP_TURBO1 BIT LOCATION (0 = LSB) 15 14 TYPICAL SETTINGS 0 0 FUNCTION Reserved. Set to 0 for normal operation. Works with RCP_TURBO2 (in the configuration register) to set the turbo charge-pump mode (see Table 7). 0 = Normal operation. 1 = Sets IF charge-pump current to turbo level and keeps it there even after lock is established. This mode provides the highest charge-pump current, but effectively no turbo mode since current is already at maximum. Reserved. Set to 01 for normal operation. Reserved. Set to 00 for normal operation. 3-bit gain balancing control. Increases IF gain by approximately 2dB per LSB. Provides a means for adjusting balance between RF and IF gain for optimized linearity. Reserved. Set to 0 for normal operation. LO buffer enable. 0 = LO buffer off. 1 = LO buffer on. Selects type of modulation. 0 = Selects direct VCO modulation (IF VCO is directly modulated and the I/Q modulator is bypassed). 1 = Selects quadrature modulation. Standby control. 0 = Shuts down everything except the registers and serial interface. 1 = Normal operation. Transmitter standby control. 0 = Shuts down the modulator and upconverter leaving PLLs locked and registers active. This bit's functionality is equivalent to that of the TX_GATE pin. 1 = Normal operation. Shutdown control. 0 = Shuts down everything except the serial interface. 1 = Normal operation.
ICP_MAX
13
0
RESERVED RESERVED IFG RESERVED BUF_EN
12, 11 10, 9 8, 7, 6 5 4
01 00 100 0 0
MOD_TYPE
3
1
STBY
2
1
TXSTBY
1
1
SHDN_BIT
0
1
______________________________________________________________________________________
13
Complete 450MHz Quadrature Transmitter MAX2370
Table 3. Configuration Register (CONFIG, Address: 0101b)
BIT NAME BIT LOCATION (0 = LSB) 15 TYPICAL SETTINGS FUNCTION IF PLL shutdown control. 0 = Shuts down IF PLL. This mode is used with an external IF PLL. 1 = Normal operation. RF PLL shutdown control. 0 = Shuts down RF PLL. This mode is used with an external RF PLL. 1 = Normal operation. Reserved. Set to 0 for normal operation. Selects the nominal I/Q input levels. 0 = Selects 300mVP-P input mode. 1 = Selects 600mVP-P input mode. Reserved. Set to 00 for normal operation. Sets the IF charge-pump current. 00 = 139A. 01 = 192A. 10 = 278A. 11 = 390A. Sets the RF charge-pump current. 00 = 325A. 01 = 650A. 10 = 738A. 11 = 1063A. Reserved. Set to 11 for normal operation. IF turbo-charge control. 0 = Disables extra charge-pump current during acquisition. 1 = Activates turbo-charge feature providing extra current during acquisition. Works with RCP_TURBO1 (in the operation control register) to set the turbo charge-pump mode (see Table 7). Determines output mode for LOCK pin as defined below: 00 = Test mode. 01 = IF PLL lock detector. 10 = RF PLL lock detector. 11 = Logical AND of IF PLL and RF PLL lock detectors.
IF_PLL_SHDN
1
RF_PLL_SHDN RESERVED IQ_LEVEL RESERVED
14 13 12 11, 10
1 0 1 00
ICP
9, 8
00
RCP
7, 6
00
RESERVED IF_TURBO_CHARGE
5, 4 3
11 1
RCP_TURBO2
2
1
LD_MODE
1, 0
11
Table 4. Current-Control Register (ICCCTRL, Address: 0110b)
BIT NAME RESERVED MPL RESERVED THROTTLE_BACK I_MULT BIT LOCATION (0 = LSB) 15, 14, 13, 12 11 10, 9, 8, 7 6, 5, 4 3, 2, 1, 0 TYPICAL SETTINGS 0000 1 1000 011 1000 FUNCTION Reserved. Set to 0000 for normal operation. Sets the maximum RF output power level. 0 = Sets to low-noise mode. 1 = Sets to normal power mode. Reserved. Set to 1000 for normal operation. Controls the throttleback rate (see Table 6). Sets the current scale factor for the PA driver (see Table 5).
14
______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
Table 5. Typical Current Scale Factors Set By I_MULT Bits
BIT NAME BITS 0011 0100 0101 0110 I_MULT 0111 1000 (default) 1001 1010 1011 1100 NOMINAL CURRENT SCALE FACTOR 0.69 0.75 0.81 0.88 0.94 1.00 1.13 1.25 1.38 1.50 THROTTLE_BACK
Table 6. Typical Throttleback Rate Set By THROTTLE_BACK Bits
BIT NAME BITS 000 001 010 011 100 101 110 111 NOMINAL RATE (dBmA/dB) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6
Table 7. RF Turbo Charge-Pump Current Setting
RCP_TURBO1 0 0 1 1 RCP_TURBO2 0 1 0 1 FUNCTION No turbo current. Charge-pump current is set by RCP bits. Turbo current turns on every time RF PLL is reprogrammed. Turbo current is automatically turned off after RF PLL is locked. Turbo current is always on. Turbo current is turned on every time RF PLL is out of lock.
Table 8. Power-Down Modes
UPCONVERTER MODULATOR RF PLL IF VCO
POWER-DOWN MODE
COMMENTS
SHDN Pin IDLE Pin TXGATE Pin RF_PLL_SHDN Bit IF_PLL_SHDN Bit TXSTBY Bit
Ultra-low shutdown current Rx only mode For punctured Tx mode For external RF PLL use For external IF PLL use Tx is OFF, but IF and RF LOs stay locked
OFF OFF OFF -- -- OFF
OFF OFF OFF -- -- OFF
OFF -- -- OFF -- --
OFF OFF -- -- -- --
OFF OFF -- -- OFF --
______________________________________________________________________________________
IF PLL
15
Complete 450MHz Quadrature Transmitter MAX2370
MAX2335 RX RECEIVER
/2
RF VCO 100pF 100pF
12k
VCC VCC 0.1F
VCC
0.1F
100pF 47nH 100pF
PA
0.047F VCC
3300pF
1000pF
0.022F 20k
VCC RFOUT N.C. LOCK VCC 100pF IDLE VCC 100pF TXGATE 100pF VCCDRV IDLE VCC TXGATE IFIN+ IFINN.C. N.C. RBIAS 10k 100pF
IFCP VCCIFCP
RFCP VCC
DUPLEXER GND N.C. GND GND LO
N.C. RFPLL VCCRFCP
0.1F
48
47
46
45
44
43
42
41
40
39
38
37
0.033F
36
51k LOCK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SPI INTERFACE

REF N.C. N.C. N.C. N.C. TANK+ TANKIFLO VCC SHDN II+ DAC 47nH
19.2MHz TCXO 33pF 5.1k
RF PLL
IF PLL
35 34 33
0 90 +45 -45
MAX2370
EP
32 31 30 29 28 27 26 25
4.7pF 33pF IFLO SHDN I VCC 0.1F
2pF TO 6.8pF 5.1k
0 /2 90
N.C. N.C. IFOUTIFOUT+
CLK
GC VCC
DI
CS
VCC
Q+ Q-
DAC
Q
CLK
CS
0.1F VGC
VCC
DI
VCC
560
0.1F
400 120MHz BPF
1000pF 100nH 9.1pF 100nH
2.7pF
9.1pF
Figure 2. MAX2370 Typical Application Circuit 16 ______________________________________________________________________________________
Complete 450MHz Quadrature Transmitter MAX2370
DI B19 (MSB) B18 B0 A3 A1 A0 (LSB) tCS > 50ns tCH > 10ns tCWH > 50ns tES > 50ns tCWL > 50ns tEW > 50ns
CLK tCWL tCS CS tEW tCH tCWH tES
Figure 3. 3-Wire Interface Timing Diagram
______________________________________________________________________________________
17
Complete 450MHz Quadrature Transmitter MAX2370
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
D2 D D/2 k
C L
b D2/2
E/2 E2/2
E
(NE-1) X e
C L
E2
k L DETAIL A e (ND-1) X e DETAIL B
e L
C L
C L
L1
L
L
e
e
A1
A2
A
TITLE:
SEMICONDUCTOR
PROPRIETARY INFORMATION
DALLAS
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
DOCUMENT CONTROL NO. REV.
APPROVAL
21-0144
1 2
D
18
______________________________________________________________________________________
32, 44, 48L QFN.EPS
Complete 450MHz Quadrature Transmitter
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX2370
SEMICONDUCTOR
PROPRIETARY INFORMATION TITLE:
DALLAS
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
DOCUMENT CONTROL NO. REV.
APPROVAL
21-0144
2 2
D
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

▲Up To Search▲

Price & Availability of MAX2370

	To Download MAX2370 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .